ports

lang/myhdl

myhdl-0.9.0 – Python as a hardware description and verification language

Description

MyHDL is an open source Python package that lets you go from Python to
silicon. With MyHDL, you can use Python as a hardware description and
verification language. Furthermore, you can convert MyHDL code, that was
developed towards implementation, to Verilog and VHDL automatically, and
take it to a silicon implementation from there.

WWW: http://www.myhdl.org/

Categories:
lang lang/python

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